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 FDC655BN Single N-Channel, Logic Level, PowerTrench(R) MOSFET
April 2005
FDC655BN Single N-Channel, Logic Level, PowerTrench(R) MOSFET
Features
6.3 A, 30 V. RDS(ON) = 25 m @ VGS = 10 V RDS(ON) = 33 m @ VGS = 4.5 V Fast switching Low gate charge High performance trench technology for extremely low Rdson
General Description
This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimized on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
D D
S
55
TM
B
G D
1 2 3
6 5 4
SuperSOT-6
D
Absolute Maximum Ratings TA = 25C unless otherwise noted
Symbol
VDSS VGSS ID PD TJ, TSTG RJA RJC Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range (Note 1a)
Parameter
Ratings
30 20 6.3 20 1.6 0.8 - 55 to +150
Units
V V A
W C C/W C/W
Thermal Characteristics Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 30
Package Marking and Ordering Information
Device Marking
.55B
Device
FDC655BN
Reel Size
7''
Tape width
8mm
Quantity
3000 units
(c)2005 Fairchild Semiconductor Corporation
1
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FDC655BN Rev. C(W)
FDC655BN Single N-Channel, Logic Level, PowerTrench(R) MOSFET
Electrical Characteristics TA = 25C unless otherwise noted
Symbol
Off Characteristics BVDSS BVDSS TJ IDSS IGSS VGS(th) VGS(th) TJ RDS(on) Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25C VDS = 24 V, VGS = 0 V VDS = 24 V, VGS = 0 V, TJ = -55C VGS = 20 V, VDS = 0 V VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25C VGS = 10 V, ID = 6.3 A VGS = 4.5 V, ID = 5.5 A VGS = 10 V, ID = 6.3 A, TJ =125C VDS = 10 V, ID = 6.3 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz 1 1.9 - 4.1 20 26 27 20 25 33 45 30 23 1 10 100 3 V mV/C A nA
Parameter
Test Conditions
Min
Typ
Max
Units
On Characteristics (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance Forward Transconductance V mV/C m
gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg(TOT) Qg(TOT) Qgs Qgd IS VSD trr Qrr
Notes: 1.
S
Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VGS = 15 mV, f = 1.0 MHz VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 570 140 70 2.1 pF pF pF 16 8 35 6 15 8 ns ns ns ns nC nC nC nC
Switching Characteristics (Note 2) Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge at Vgs=10V Total Gate Charge at Vgs=5V Gate-Source Charge Gate-Drain Charge VDD = 15 V, ID = 6.3 A, 8 4 22 3 10 6 1.7 2.1
Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A Diode Reverse Recovery Time Diode Reverse Recovery Charge (Note 2) 0.8 18 9 IF = 6.3 A, dIF/dt = 100 A/s 1.3 1.2 A V ns nC
RJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a. b. 78C/W when mounted on a 1in2 pad of 2oz copper on FR-4 board. 156C/W when mounted on a minimum pad.
2.
Pulse Test: Pulse Width 300 s, Duty Cycle 2.0%
2 FDC655BN Rev. C(W)
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FDC655BN Single N-Channel, Logic Level, PowerTrench(R) MOSFET
Typical Characteristics
25 VGS = 10V 20 4.0V 2.2 VGS = 3.5V 2 1.8 1.6 1.4 1.2 1 0.8 0 1 2 3 0 5 10 15 20 25 VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
6.0V
4.5V
15 3.5V 10
R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE
4.0V 4.5V 5.0V 6.0V 10V
5
3.0V
0
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.09
1.6
RDS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE
I D = 6.3A VGS = 10.0V
I D = 3.2A
1.4
RDS(ON) , ON-RESISTANCE (OHM)
0.07
1.2
0.05 TA = 125 oC 0.03
1
0.8
T A = 25 C
o
0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150
0.01 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10
Figure 3. On-Resistance Variation withTemperature.
25 VDS = 5V 20 100
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
VGS = 0V
I S, REVERSE DRAIN CURRENT (A)
10
ID, DRAIN CURRENT (A)
1
15
TA = 125C 25C -55C
0.1
10 TA = 125 C -55C 5 25C 0 1.5 2 2.5 3 3.5 4 4.5 VGS, GATE TO SOURCE VOLTAGE (V)
0.01
0.001
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 VSD , BODY DIODE FORWARD VOLTAGE (V) 1.4
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
3 FDC655BN Rev. C(W)
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FDC655BN Single N-Channel, Logic Level, PowerTrench(R) MOSFET
Typical Characteristics
10 800
ID = 6.3A VDS = 10V 20V f = 1MHz VGS = 0 V
VGS, GATE-SOURCE VOLTAGE (V)
8
15V
CAPACITANCE (pF)
600
6
Ciss
400
4
Coss
200
2
Crss
0 0 2 4 6 8 Qg, GATE CHARGE (nC) 10 12 0 0 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100 RDS(ON) LIMIT 100 s 1ms 10ms 100ms 1s 1 DC VGS = 10.0V SINGLE PULSE R JA = 156 oC/W T A = 25 C 0.01 0.1 1 10 100 VDS , DRAIN-SOURCE VOLTAGE (V)
o
Figure 8. Capacitance Characteristics.
5
P(pk), PEAK TRANSIENT POWER (W)
I D, DRAIN CURRENT (A)
10
4
SINGLE PULSE R JA = 156C/W TA = 25C
3
10s
2
0.1
1
0 0.1 1 10 t1, TIME (sec) 100 1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
0.1
0.1 0.05 0.02 0.01
R JA(t) = r(t) * R JA R JA = 156C/W P(pk) t1 t2
SINGLE PULSE
0.01
TJ - TA = P * R JA(t) Duty Cycle, D = t1 / t2 0.01 0.1 t1, TIME (sec) 1 10 100 1000
0.001 0.0001
0.001
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
4 FDC655BN Rev. C(W)
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FDC655BN Single N-Channel, Logic Level, PowerTrench(R) MOSFET
Typical Characteristics
VDS VGS RGE
0V
L
BVDSS tP
DUT
+
VDD
VDS IAS VDD
-
tp
VGS
IAS
0.01
vary tP to obtain required peak IAS
tAV
Figure 12. Unclamped Inductive Load Test Circuit
Drain Current Same type as DUT
Figure 13. Unclamped Inductive Waveforms
+
10V
50k 10 F 1F
-
+
VDD
-
VGS DUT VGS Ig(REF) QGS 10V
QG(TOT)
QGD
Charge, (nC)
Figure 14. Gate Charge Test Circuit
Figure 15. Gate Charge Waveform
tON tOFF td(OFF) tf
VDS VGS RGEN
RL VDS
td(ON)
90%
tr
90%
+
DUT VDD
0V 10% 90% 10%
-
VGS VGS
Pulse Width 1s Duty Cycle 0.1%
50% 0V 10%
50%
Pulse Width
Figure 16. Switching Time Test Circuit
Figure 17. Switching Time Waveforms
5 FDC655BN Rev. C(W)
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FDC655BN Single N-Channel, Logic Level, PowerTrench(R) MOSFET
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM FAST ActiveArrayTM FASTrTM BottomlessTM FPSTM CoolFETTM FRFETTM CROSSVOLTTM GlobalOptoisolatorTM DOMETM GTOTM EcoSPARKTM HiSeCTM E2CMOSTM I2CTM EnSignaTM i-LoTM FACTTM ImpliedDisconnectTM FACT Quiet SeriesTM
IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM Across the board. Around the world.TM OPTOLOGIC OPTOPLANARTM The Power Franchise PACMANTM Programmable Active DroopTM
POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM SILENT SWITCHER SMART STARTTM
SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic TINYOPTOTM TruTranslationTM UHCTM UltraFET UniFETTM VCXTM
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I15
6 FDC655BN Rev. C(W)
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